library verilog;
use verilog.vl_types.all;
entity uart_rx_tb is
    generic(
        baud_115200_cycle: integer := 8681;
        baud_19200_cycle: integer := 52083;
        baud_9600_cycle : integer := 104167;
        baud_cycle      : vl_notype
    );
    attribute mti_svvh_generic_type : integer;
    attribute mti_svvh_generic_type of baud_115200_cycle : constant is 1;
    attribute mti_svvh_generic_type of baud_19200_cycle : constant is 1;
    attribute mti_svvh_generic_type of baud_9600_cycle : constant is 1;
    attribute mti_svvh_generic_type of baud_cycle : constant is 3;
end uart_rx_tb;
